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Welcome to the Cadence podcasting channel powered by PodTech.net. Cadence enables global electronic-design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. Cadence reported 2005 revenues of approximately $1.3 billion, and has approximately 5,100 employees. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.

Recent podcasts

Cadence: Driving Innovation for Logic Designers

14/06/2007

The Design Automation Conference was held in San Diego recently, and Cadence [1] hosted a very cool event at the San Diego Automotive Museum [2] one evening. Surrounded by classic cars from all eras, logic designers enjoyed great food and drink, caught up with colleagues, met with Cadence Logic Design experts, and saw the latest in the Cadence Logic Design Team Solution. And one lucky person drove away in a brand new Ford Mustang. This video podcast gives you a glimpse of the action at the Cadence: Driving Innovation event. [1] http://www.cadence.com/ [2] http://www.sdautomuseum.org/

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CDNLive! EMEA: Munich, Germany

31/05/2007

CDNLive! EMEA [1] recently concluded in Munich, Germany. It's part of the Cadence Design Systems [2] series of worldwide conferences designed to bring technology users together to share ideas and tackle complex issues, both with peers and with Cadence technologists - and to mix in a little fun as well. In this podcast, we hear a variety of viewpoints on the conference itself, we get highlights of product announcements made at CDNLive!, and we focus in on the EMEA geography that was a big part of CDNLive! Munich. [1] http://www.cadence.com/cdnlive [2] http://www.cadence.com

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CDNLive! EMEA: Cadence CEO Mike Fister

23/05/2007

We catch up with Cadence [1] CEO Mike Fister at CDNLive! EMEA, the recently-concluded conference in Munich. There, we get his views on issues ranging from the nature of CDNLive! to the special challenges facing electronics designers and manufacturers in the Europe-Middle East-Africa geography. [1] http://www.cadence.com/

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High Demand for Low Power

29/01/2007

Low power is becoming more and more popular in the design community, pushing designers to become more and more creative. Neil Hand of Cadence [1] gives us a look at  the technical considerations and hurdles, and a glance at what Cadence is doing to meet the needs of the marketplace. Transcript: Host: Paul Lancour - PodTech Guest: Neil Hand - Cadence Paul Lancour - PodTech I’m Paul Lancour with PodTech.net and I’m here with Neil Hand. He’s the director of Vertical Solutions Marketing at Cadence. Neil, thanks for joining us. Neil Hand - Cadence Thank you. Paul Lancour - PodTech I want to start off by talking you about – this is the low power podcast and the first thing I want to ask you is, why low power has become such a hot topic in design community. Neil Hand - Cadence Well, there is a lot of reasons. The first and most obvious one is the increase in the use of mobile devices and the desire of people put more functionality in those devices as well as having longer battery life and so forth. But, there’s a lot of other factors apply there as well. Even for the non battery powered device as we put more functionality and we are increasing the power density it’s getting more and more difficult to build these devices within the specs that are required by the customer. So, that can be cured correctly into the system can function correctly. So, this is driving it as well. And this is being made even worse as we go to smaller process geometries. As we go to the process geometry of 90 nanometers and below and specially at 65 nanometers what’s happening in the chips is a leakage current and the clocking are becoming the dominant power users in the designs and so what we need to do we start more actively managing the power in these devices otherwise we’re aren’t be going to manufacture or run the devices. And so the traditional approaches that the people have used just to add on some power optimization in the life stage of the design flow are really not longer working. We have to build in power right from the get go as part of the design process so we can make sure that the designs both meet the requirements of the end product but also can be manufactured and manufactured within the constraints of the system that have been designed. Paul Lancour - PodTech So, it sounds like those are the forces in the market that are driving low power design and it sounds also like it’s pushing it up against the limits of the ability to design such low power devices. So, when considering low power, what kind of an impact does it have on design? Neil Hand - Cadence It really touches your every part of the design process if it’s done properly. When we think of low power what you really want to do is think of low power and not just as a what am I, how am I going to use a low power process from the vendor, (Inaudible) we really want to think of low power right from the architectural design of the chip all the way down to our vendor selection and implementation. And we need to consider it because any -- if we don’t consider it through out the whole process, if we miss it just in one part of our design or verification activities, all of a sudden all of the good that we may have done in another part of the design process is going to be undone. So, we need to make sure that we take it into account through every stage of the design process. Paul Lancour - PodTech So, I imagine that create some significant challenges for the design team. Neil Hand - Cadence It does. So, typically the design team is your team is thinking is (Inaudible) about meeting timing, (Inaudible) about meeting area constraints getting timing and single integrity in closer. Now, we’re adding into that all of these power constraints. Is the device going to have to correct power utilization, as our leakage current being managed, is there are going to be any hotspots on the device itself? And so what we need to do is be abl

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CDNLive!: Customer is Key in Designing the Future

16/09/2006

Ted Vucurevich, Chief Technical Officer at Cadence Design Systems, gave a keynote at Cadence’s CDNLive! event at the San Jose Convention Center, “Designing the Future.” Right after his address, Vucurevich talked with PodTech.net about the future of the chip design process. Vucurevich, who serves on the steering committee the Cadence Designer Network, also talked about the customer’s changing role in driving design systems, processes and solutions.

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